A Review Paper on Memory Testing using BIST
Ritu Singh Thakur, Dr. C. V. Raman University kola, Bilaspur (C.G.); Akanksha Awasthi ,Dr. C. V. Raman University kola, Bilaspur (C.G.)
Built-in Self-Test, Random Access Memory, CUT circuit under test, TPG Test Pattern Generation, Response Analysis
In this review paper, Built-in self-test has been studied. This Built-in Self-Test (BIST) technique not only helpful from economically but also it gives test logic for the test pattern. This paper concluded basic test problems and some reliable methods of solution discussed in this paper while studied level of BIST. The basic concept of BIST that it provide a path by which system could test itself.
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Paper ID: GRDJEV01I040106
Published in: Volume : 1, Issue : 4
Publication Date: 2016-04-01
Page(s): 94 - 98
Published in: Volume : 1, Issue : 4
Publication Date: 2016-04-01
Page(s): 94 - 98